Which NAND type lasts the longest?

In order: SLC, then pSLC, then MLC, then TLC, then QLC. Each extra bit stored per cell costs roughly ten times the program/erase endurance, because more bits means more voltage levels packed into the same window, with tighter margins and heavier error correction.

No. Modern 3D TLC is the mainstream sweet spot — good capacity per dollar with endurance that comfortably covers most client and many industrial uses. It is only the wrong pick for sustained, write-heavy duty cycles (24/7 recording, heavy logging), where pSLC, MLC or a purpose-built high-endurance part is the right call.

SLC, MLC, TLC, QLC and pSLC — the one NAND choice under every flash spec

Q: What is pSLC and why does industrial storage use it?

Pseudo-SLC is MLC or TLC flash operated in 1-bit-per-cell mode. It trades away capacity to win back endurance — roughly 20,000–40,000 P/E cycles, approaching true SLC — at a lower cost than SLC. That balance of high endurance, wide temperature tolerance and reasonable cost is why industrial cards and SSDs favour it.

Most flash specs — capacity, price, speed, endurance, temperature rating — trace back to a single design decision: how many bits each memory cell holds. Get that one number, and the rest of the datasheet stops being a list of disconnected figures and starts making sense.

The ladder: more bits, more storage, less life

A NAND cell stores data as an electrical charge. Read it as two levels and you get one bit; split the same charge window into more levels and you pack in more bits — at the cost of telling those levels apart reliably.

Type	Bits/cell	Voltage states	Typical P/E cycles	Where it fits
SLC	1	2	50,000–100,000	Extreme write/endurance, harsh
pSLC	1 (from MLC/TLC)	2	20,000–40,000	Industrial, write-heavy
MLC	2	4	3,000–10,000	Industrial / embedded
3D TLC	3	8	1,000–3,000	Mainstream client & industrial
QLC	4	16	100–1,000	Read-heavy, high-capacity, archival

P/E ranges per Lexar Enterprise and Delkin; figures vary by maker and NAND generation [1][3].

Why each extra bit costs so much

The penalty is regular: each additional bit per cell costs roughly an order of magnitude in endurance [1]. The reason is physical. One bit needs two charge levels — easy to distinguish. Three bits needs eight levels crammed into the same voltage window, four bits needs sixteen. The more levels, the smaller the margin between them, the more sensitive the cell is to wear and noise, the harder the controller has to work with error correction, and the fewer times you can erase and rewrite before the gaps blur. Density, speed and endurance pull against each other, and bits-per-cell is the dial that sets all three.

What 3D NAND changed

For years the only way to add capacity was to shrink cells on a flat (planar) die — which made them leakier and less durable just as TLC arrived. 3D NAND broke that trap by stacking cells in layers instead of shrinking them, so each cell could stay larger and more reliable while density came from height. That's what made 3D TLC trustworthy enough for the mainstream and QLC viable at all [2]. It's also why a "TLC" part today can far outlast a planar TLC part from a decade ago — the label alone doesn't tell you the generation.

pSLC: buying endurance back

There's a clever middle option. Pseudo-SLC (pSLC) takes MLC or TLC silicon and runs it in 1-bit-per-cell mode — deliberately storing less to regain margin. The result is roughly 20,000–40,000 P/E cycles, approaching true SLC, at a lower cost than SLC and with wide temperature tolerance [3]. You give up capacity to win durability, which is exactly the trade industrial and embedded designs want — so pSLC is what you'll often find inside industrial-grade cards and SSDs.

Which type for which job

SLC / pSLC — continuous-write and harsh-environment roles: industrial logging, automotive, mission-critical.
MLC — industrial and embedded systems that need durability without SLC cost.
3D TLC — the mainstream default: client SSDs, general storage, most consumer and many industrial cards.
QLC — read-heavy and high-capacity: media libraries, archives, and the high-density enterprise SSDs replacing hard drives — not constant rewriting.

The caveat

"TLC" on its own doesn't settle the question. The 3D generation, how the dies were binned, the controller and the firmware all move real endurance up or down within a type. So treat cell type as the first cut, then judge on the figure that actually matters — the rated TBW or DWPD, and for cards the P/E and endurance grade.

Bottom line

Bits per cell is the dial behind the whole datasheet: more for capacity and cost, fewer for speed and life. Read the type to know roughly where a part sits — SLC and pSLC for endurance, TLC for the mainstream, QLC for read-heavy capacity — then confirm with the rated endurance figure, not the marketing word. We state the NAND type and endurance rating for every part we sell, so you can match the cell to the workload instead of guessing from the label.